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ADuC7060
UART Status Register 1
COMSTA1 Register
Table 91. COMIEN0 MMR Bit Designations
Bit Name Description
Name:
COMSTA1
7:4
Reserved. Not used.
Address:
Default value:
0xFFFF0718
0x00
3
EDSSI
Modem status interrupt enable bit.
Set by user to enable generation of an
interrupt if any of COMSTA1[3:1] are set.
Cleared by user.
Access:
Function:
Read only
COMSTA1 is a modem status register.
2
ELSI
Receive status interrupt enable bit.
Set by user to enable generation of an
interrupt if any of the COMSTA0[3:1] register
Table 90. COMSTA1 MMR Bit Descriptions
Bit Name Description
7:5 Reserved. Not used.
4 CTS Clear to send.
3:1
Reserved. Not used.
1
ETBEI
bits are set.
Cleared by user.
Enable transmit buffer empty interrupt.
Set by user to enable an interrupt when the
buffer is empty during a transmission; that is,
when COMSTA[5] is set.
0
DCTS
Delta CTS.
Cleared by user.
Set automatically if CTS changed state since
COMSTA1 was last read.
Cleared automatically by reading COMSTA1.
0
ERBFI
Enable receive buffer full interrupt.
Set by user to enable an interrupt when the
buffer is full during a reception.
Cleared by user.
UART Interrupt Enable Register 0
COMIEN0 Register
UART Interrupt Identification Register 0
Name:
COMIEN0
COMIID0 Register
Address:
Default value:
Access:
Function:
0xFFFF0704
0x00
Read and write
The 8-bit register enables and disables the
individual UART interrupt sources.
Name:
Address:
Default value:
Access:
Function:
COMIID0
0xFFFF0708
0x01
Read only
This 8-bit register reflects the source of the
UART interrupt.
Rev. 0 | Page 79 of 100
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